
Digital PUF IP
Small footprint trusted identity
Generate unclonable 128 or 256-bit seeds with a compact, logic-based PUF that drops into any SoC. Digital PUF IP adds true hardware identity for secure boot, key generation, and device authentication with minimal silicon overhead.
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Whether you design silicon, architect security, or validate compliance, Digital PUF IP delivers the trust anchor you need
- SoC & ASIC Designers
Add hardware identity and key‐seed generation without large area or external fuses. - Security Architects
Tie secure boot and root-of-trust schemes to a physically unclonable seed. - Embedded Platform Engineers
Pair with TRNG or secure-element blocks for complete crypto workflows. - Compliance & QA Teams
NIST-validated entropy and health tests simplify certification and audit.
Unclonable Identity
Each device derives a unique, tamper-resistant seed for authentication and key generation
Customisable Security
Choose 128- or 256-bit seeds to match application requirements and crypto policies
Low Silicon Footprint
<30 kGates (typical) including fuzzy extractor
Layout-Hardened Reliability
Optimised logic cells reduce silicon skew and improve bit stability
Standards Validated
Randomness validated against NIST SP800, including CQ’s PUF-appropriate TurRiNG test suite and BSI’s AIS31 test suites
Easy SoC Integration
APB or AXI interface options drop into existing bus architectures
Logic-Based Entropy Array
Static mismatch in logic cells produces a high-entropy bitstring that is unique per device
Fuzzy Extractor & Helper Data
Built-in error-correction logic creates helper data for repeatable seed regeneration with 1 × 10⁻⁹ failure rate
NIST-Validated Randomness
Raw entropy and post-correction output meet SP 800-22 and SP 800-90B requirements
Configurable Seed Size
Select 128-bit or 256-bit output to align with AES, ECC, or PQC key strengths
Hardened Physical Design
Layout guidelines and optional skew-reduction techniques improve robustness across technology nodes
Custom Bus Interface
APB by default; AXI or proprietary bus options available for seamless SoC connectivity
Seed Size
128 or 256-bit seeds meet modern crypto requirements and feed directly into key-generation flows
Reliability
Post-correction failure rate is 1 × 10⁻⁹ and raw entropy passes NIST SP 800-90B health tests
Footprint
Complete core, including fuzzy extractor, fits in < 30 kGates on typical IoT nodes
Interfaces
Default APB bus; AXI option available. Output randomness validated to NIST SP 800-22 and AIS31
PUF Applications
Device identity, key generation, authentication, etc
Pairs With
QRoot Lite IP, TRNG IP, Agile Secure Element
Health Tests
Built-in startup and continuous entropy checks
Compliance
Simplifies CRA, ISO/IEC 20897, and Common Criteria evaluations
Start building silicon that proves itself.
Digital PUF IP adds a hardware root of identity without large area or external memories. Talk to us about evaluation RTL, reference fuzz-extractor code, and integration support.
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